22nd IEEE Latin-American Test Symposium

Virtual Symposium, 27th - 29th October 2021




As much as we were looking forward to welcome you back personally this year, our concern for the health and wellbeing of all participants has prevailed. As consequence, we have decided to transform the 22nd edition into a virtual symposium.


More details regarding procedures and organization will follow soon.





You can now register for LATS2021!


For more details about the registration via Whova check out our Registration section [here].





We have prepared an interesting technical program for you!


For the program, please check our dedicated section [here].

We have just added more detailed information regarding our talks and speakers, you can find them [here].



The IEEE Latin-American Test Symposium (LATS) is a recognized test and fault tolerance techniques forum attended by professionals from all over the world, in particular from Latin-America, to present and discuss various aspects of system, board, and component testing as well as design, manufacturing and in-field considerations with fault tolerance in mind. Accepted papers will be submitted for inclusion into IEEE Xplore subject to meeting IEEE Xplore’s scope and quality requirements. Further, the best papers of its 22nd edition will be invited to re-submit to IEEE Design&Test, Journal of Electronic Testing: Theory and Applications (JETTA - Springer) and IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).



Topics of interest include but are not limited to:


CAD for robust circuits design

Cross-layer reliability approaches

Dependable system design

Dependable Computer Architectures

Design for Electromagnetic Compatibility (EMC)

Design for reliability

Design for reliability approaches for Low-Power

Design for Robustness

Design for Security

Fault-based attacks and countermeasures

Fault-tolerant and fail-safe systems

Field Diagnosis, maintainability, and reconfiguration

Functional safety

IC- and system-level radiation hardening techniques







Infrastructure, cloud computing, and wired, cellular

and satellite communications

Memory test and repair

On-line monitoring

On-line testing techniques

Power density and overheating issues in

nanometer technologies

Quality, yield, reliability and lifespan issues

in nanometer technologies

Reliability issues of Low-Power Design

Robustness evaluation

Self-Adapting design

Self-checking circuits and coding theory

Self-Healing design

Self-Regulating design

Self-test and self-repair

Variability, Aging, EMI, and Radiation Effects in              nanometer technologies



On behalf of the organizing committee, we would like to thank all those who already contributed with their submissions. Soon we will have concluded our thorough review process and notify all authors regarding the selection results.


For additional information, please contact our Program Co-Chairs:


Leticia Bolzani Poehls – RWTH Aachen, Germany  ([email protected])

Fabian Luis Vargas - PUCRS, Brazil ([email protected])



NEW Submission Deadline (Title and Abstract):  May 21st, 2021

NEW Submission Deadline (Full paper): May 28th, 2021

NEW Notification of Acceptance:  August 6th, 2021

NEW Camera Ready Submission: August 20th, 2021




To download the Call for Papers, please click [here].







The Institute of Electrical and

Electronics Engineering, Inc.


IEEE Council on Electronic Design Automation


Test Technology Technical Council


PUCRS, Brazil