22nd IEEE Latin-American Test Symposium

Virtual Symposium, 27th - 29th October 2021

 

TECHNICAL PROGRAM

 

We are glad to present the preliminary technical program.

For more detail regarding this year's talks, please check our detailed section [here].

 

The online version, with the very latest updates, can be accessed at this link:

https://whova.com/embedded/event/lats_202110/?utc_source=ems

 

A digital proceeding has been prepared and can be downloaded [here] - the necessary password has been send to the participants and authors.

 

Please check out what we have prepared for you:

 

 

October 27th, 2021 (Wednesday)

 

 

10:00 - 10:30 (GMT-3, Brazil): Opening Session

 

General Chairs:

Raoul Velazco – TIMA  (France)

Yervant Zorian – Synopsys (USA)

 

Program Chairs:

Letícia Maria Bolzani Pöhls – RWTH Aachen University (Germany)

Fabian Luis Vargas – PUCRS (Brazil)

 

 

10:30 – 11:10 (GMT-3, Brazil): Invited Talk

Hardware Security and Machine Learning: Hero or Hoax?

Prof. Giorgio di Natale, Université Grenoble Alpes (France)

Session Chairs: Yervant Zorian, Synopsys (USA) and Fabian Luis Vargas, PUCRS (Brazil)

 

 

11:10 – 11:50 (GMT-3, Brazil): Session 1

Diagnosis and On-Line Monitoring of Analog Circuits

Session Chair: Tiago Balen, UFRGS (Brazil)

 

Improved Fault Diagnosis of Analog Circuits using Light Emission Measures

Tommaso Melis, Emmanuel Simeu, Etienne Auvray and Luc Saury

 

Exploring On-Line RF Performance Monitoring based on the Indirect Test Strategy

Hassan El Badawi, Florence Azais, Serge Bernard, Mariane Comte, Vincent Kerzerho and François Lefevre

 

 

11:50 – 12:30 (GMT-3, Brazil): Session 2

Test and Reliability of Memories

Session Chair: Victor Champac, INAOE (Mexico)

 

Comparing different solutions for testing resistive defects in low power SRAMs

Nunzio Mirabella, Michelangelo Grosso, Giovanna Franchino, Salvatore Rinaudo, Ioannis Deretzis, Antonino La Magna and Matteo Sonza Reorda

 

Impact of DVS on power consumption and SEE sensitivity of COTS volatile SRAMs

Mohammadreza Rezaei, Francisco J Franco, Juan Carlos Fabero, Hortensia Mecha, Helmut Puchner and Juan Antonio Clemente

 

 

12:30 – 14:00 (GMT-3, Brazil): Coffee break / Lunch

 

 

14:00 – 15:00 (GMT-3, Brazil): Embedded Tutorial 1

A Tutorial on Design Obfuscation: from Transistors to Systems

Prof. Samuel Pagliarini, Tallinn University of Technology (Estonia)

Session Chair: TBD

 

 

15:00 – 15:45 (GMT-3, Brazil): Visionary Talk

Prof. Krishnendu Chakrabarty, Duke University (USA)

Session Chair: Fabian Luis Vargas, PUCRS (Brazil)

 

 

15:45 – 16:00 (GMT-3, Brazil): Coffee break

 

 

16:00 – 17:20 (GMT-3, Brazil): Session 3

Radiation and Soft Errors in Memories and Logic Circuits

Session Chair: TBD

 

Thermal-Neutron Induced SEUs on a 28-nm SRAM-based FPGA under Different Incident Angles

Juan Carlos Fabero, Golnaz Korkian, Francisco J Franco, Hortensia Mecha, Manon Letiche and Juan Antonio Clemente

 

Total Ionizing Dose Effects on Floating Gate Structures: Preliminary Results

Sebastián Carbonetto, Luciano Genovese, Lucas Sambuco Salomone, Mariano Garcia Inza, Eduardo Gabriel Redin and Adrian Faigon

 

A COTS GaN Transistor is More Tolerant to Radiation in its ON State

Alexis Cristiano Vilas Bôas, Marco Melo, Renato Giacomini, Roberto Baginski Batista Santos, Nilberto Heder Medina, Luis Seixas, Saulo Finco, Rogelio Palomo and Marcilei Aparecida Guazzelli.

 

Exploring Gate Mapping and Transistor Sizing to Improve Radiation Robustness: A C17 Benchmark Case-Study

Bernardo Borges Sandoval, Leonardo H. Brendler, Alexandra Lackmann Zimpeck, Fernanda Kastensmidt, Ricardo Reis and Cristina Meinhardt

 

 

October 28th, 2021 (Thursday)

 

 

10:00 - 10:40 (GMT-3, Brazil): Invited Talk 2

Analyzing Data Extracted from Radiation Tests in Advanced SRAMs

Prof. Juan Antonio Clemente Barreira, UCM (Spain)

Session Chair: Raoul Velazco, TIMA (France)

 

 

10:40 – 11:40 (GMT-3, Brazil): Session 4

Understanding Variability and Reliability Impacts on Resistive RAMs

Session Chair: TBD

 

Evaluating the Impact of Process Variation on RRAMs

Eduardo Brum, Moritz Fieback, Thiago Santos Copetti, Jiayi He, Said Hamdioui, Fabian Vargas and Leticia Bolzani Poehls

 

Investigation of Single Event Effects in a Resistive RAM Memory Array by SPICE Level Simulation

Karine Coulié, Hassen Aziza and Wenceslas Rahajandraibe

 

Design Considerations Towards Zero-Variability Resistive RAMs in HRS State

Aziza Hassan, Karine Coulié and Wenceslas Rahajandraibe

 

 

11:40 – 12:20 (GMT-3, Brazil): Industry Talk 1

How to Feed a Growing Population while Conserving the Planet's Resources – IoT to the Rescue

Dr. Victor Grimblatt, Synopsys (Chile)

Session Chair: TBD

 

 

12:20 – 13:00 (GMT-3, Brazil): Coffee break / Lunch

 

 

13:00 – 14:00 (GMT-3, Brazil): Embedded Tutorial 2

Approximate Computing for Safety-Critical Applications

Prof. Alberto Bosio, University Lyon (France); Gennaro Rodrigues, UFRGS (Brazil) and

Fernanda Kastensmidt, UFRGS (Brazil)

Session Chair: Michelangelo Grosso, Politecnico di Torino (Italy)

 

 

14:00 – 15:00 (GMT-3, Brazil): Poster Session

Session Chair: TBD

 

Towards SAT-Based SBST Generationfor RISC-V Cores

Tobias Faller, Philipp Scholl, Tobias Paxian and Bernd Becker

 

SET Mitigation Techniques on Mirror Full Adder at 7nm FinFET Technology

Rafael Neves de Mello Oliveira, Fábio G. R. G. da Silva, Ricardo Reis and Cristina Meinhardt

 

TLP Generator Setup for Reliable Switching Characterization of Commercial GaN HEMTs

Carlos Bernal, Manuel Jimenez and Fabio Andrade

 

NETFI-2: A SEU and SET Fault-Emulation Methodology for HDL-Based Designs

Miguel Solinas, Dardo Vinas, Alexander Coelho, Juan Fraire, Juan Clemente and Pablo Ferreyra

 

EC Scalar Multiplication: Successful Simple Address-Bit SCA Attack against Atomic Patterns

Ievgen Kabin, Zoya Dyka, Dan Klann and Peter Langendoerfer

 

 

15:00 – 15:40 (GMT-3, Brazil): Invited Talk 3

Prof. Victor Champac, INAOE (Mexico)

Session Chair: Maksim Jenihhin, Tallin University of Technology (Estonia)

 

 

15:40 – 16:20 (GMT-3, Brazil): Session 5

Fault Tolerant Systems

Session Chair: Felipe Restrepo Calle, Universidad Nacional de Colombia (Colombia)

 

Fault-Tolerant Quasi Delay Insensitive Combinational Circuits in Commercial FPGA Devices

Orlando Verducci, Duarte Oliveira and Robson Moreno

 

Reliability Evaluation of Voters for Fault Tolerant Approximate Systems

Tiago Balen, Carlos González, Ingrid Oliveira, Rafael Schvittz, Nemitala Added, Eduardo Macchione, Vitor Aguiar, Marcilei Guazzelli, Nilberto Medina and Paulo Butzen

 

 

16:20 – 17:00 (GMT-3, Brazil): Invited Talk 4

Trustworthy Autonomous Systems: Software-Hardware Error Resilience Using

Hierarchical Algorithmic Checks

Prof. Abhijit Chatterjee, Georgia Institute of Technology (USA)

Session Chair: Fabian Luis Vargas, PUCRS (Brazil)

 

 

 

October 29th, 2021 (Friday)

 

 

10:00 – 10:40 (GMT-3, Brazil): Industry Talk 2

Soft Error becomes a Hard Problem for the Future Electronic Devices

Dr. Sung S. Chung, CTO, QRT Inc. Korea (Korea)

Session Chair: Hans-Joachim Wunderlich, University of Stuttgart (Germany)

 

 

10:40 – 12:00 (GMT-3, Brazil): Session 6

Defect Modeling and Fault Injection Strategies

Session Chair: TBD

 

Invited paper: Pros and Cons of Fault Injection Approaches for the Reliability Assessment of Deep Neural Networks

Annachiara Ruospo, Lucas Matana Luza, Alberto Bosio, Marcello Traiola, Luigi Dilillo and Ernesto Sanchez

 

Reliability Evaluation of RISC-V and ARM Microprocessors Through a New Fault Injection Tool

Alexander Aponte-Moreno, Felipe Restrepo-Calle and Cesar Pedraza Bonilla

 

Testing Embedded Software Through Fault Injection: Case Study on Smart Lock

Jakub Lojda, Richard Panek, Jakub Podivinsky, Ondrej Cekan, Martin Krcma and Zdenek Kotasek

 

Resistive Open Defect Classification of Embedded Cells under Variations

Zahra Paria Najafi Haghi and Hans-Joachim Wunderlich

 

 

12:00 – 13:00 (GMT-3, Brazil): Coffee break / Lunch

 

 

13:00 – 13:40 (GMT-3, Brazil): Invited Talk 5:

Embedded Wireless Delay Tolerant Networks on Chips for Segmented Architectures

Prof. Pablo Ferreyra, Universidad Nacional de Córdoba (Argentina)

Session Chair: Raoul Velazco, TIMA (France)

 

 

13:40 – 14:20 (GMT-3, Brazil): Session 7

Designing Aerospace Applications

Session Chair: Emmanuel Simeu, Université Grenoble Alpes (France)

 

Evaluation of Attitude Estimation Algorithm under Soft Error Effects

João P. Brum, Tarso Sartori, Jiaru Lin, Matheus Trindade, Hassen Fourati, Raoul Velazco and Rodrigo Possamai Bastos

 

Nanosatellite On-Board Computer including a Many-Core Processor

Fabrice Pancher, Vanessa Vargas, Pablo Ramos, Rodrigo Possamai Bastos, David César Ardiles Saravia and Raoul Velazco

 

 

14:20 – 15:00 (GMT-3, Brazil): Closing Session

 

 

 

 

The LATS2021 Organizing Committee